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Date tag: March 1 2010 6:17:22
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Date tag: March 1 2010 6:12:33
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Date tag: March 1 2010 6:11:14
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Date tag: March 1 2010 6:7:32
Moore and Mealy Machines Moore: outputs depend only on present state Mealy: outputs also depend on inputs
Date tag: March 1 2010 6:3:59
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Date tag: March 1 2010 6:3:45
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Date tag: March 1 2010 5:54:29
t flip flop
Date tag: March 1 2010 5:49:26
State diagram
Date tag: March 1 2010 5:47:52
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Date tag: March 1 2010 5:43:27
Characteristic equations
Date tag: March 1 2010 5:38:13
JK flip flop, State equations
Date tag: February 26 2010 6:22:59
State diagram
Date tag: February 26 2010 6:18:36
Another D flip flop example
Date tag: February 26 2010 6:15:51
State diagram
Date tag: February 26 2010 6:7:6
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Date tag: February 26 2010 6:3:5
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Date tag: February 26 2010 5:59:12
Analysis of sequential circuits: Derivation of state equations, state tables, or a state diagram.
Date tag: February 26 2010 5:59:0
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Date tag: February 26 2010 5:50:44
Direct inputs. A present of direct set input sets the state to 1. A clear or direct reset input setes the state to 0. These are asynchronous inputs independent of the clock.
Date tag: February 26 2010 5:47:41
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Date tag: February 26 2010 5:44:28
Can alternatively write characteristic equations.
Date tag: February 26 2010 5:42:26
JK flip flop
Date tag: February 26 2010 5:39:28
Characteristic tables: Let Q of t refer to flip flop state at present and Q of t plus 1 to its state after the next triggering.
Date tag: February 26 2010 5:34:56
Positive edge triggered D flip flop
Date tag: February 24 2010 4:57:52
T flip flop
Date tag: February 24 2010 4:55:36
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Date tag: February 24 2010 4:55:14
positive edge triggered D flip flop
Date tag: February 24 2010 4:54:36
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Date tag: February 24 2010 4:54:15
D latch positive edge triggering
Date tag: February 22 2010 10:40:13
circuits lab 2
Date tag: February 22 2010 10:39:37
circuits lab 2
Date tag: February 22 2010 10:37:7
circuits lab 2
Date tag: February 22 2010 10:20:55
circuits lab 2
Date tag: February 22 2010 10:2:10
circuits lab 2
Date tag: February 22 2010 9:57:23
circuits lab 2
Date tag: February 22 2010 6:21:43
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Date tag: February 22 2010 6:21:36
D latch
Date tag: February 22 2010 6:17:9
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Date tag: February 22 2010 6:14:9
If enable is 0 the latch is held. If it is 1 the gates act as inverters.
Date tag: February 22 2010 6:7:19
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Date tag: February 22 2010 5:53:11
If S equals R equals 1 then Q equals Q prime equals 0 which we must avoid.
Date tag: February 22 2010 5:45:47
SR Latch
Date tag: February 22 2010 5:45:35
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Date tag: February 22 2010 5:37:37
Synchronous Sequential circutis
Date tag: February 12 2010 6:19:51
2 level carry lookahead
Date tag: February 12 2010 6:18:9
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Date tag: February 12 2010 6:15:13
Carry lookahead full adder, carry propogate
Date tag: February 12 2010 6:11:21
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Date tag: February 12 2010 6:8:41
Simplification of k maps is done by considering logically adjacent items as geometrically adjacent.
Date tag: February 12 2010 6:6:1
Canonical forms are sums of minterms, and products of maxterms. These terms include 1 literal for each variable.
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